1. Field of the Invention
The present invention relates to a timing adjustment circuit, a solid-state image pickup element, and a camera system, such as a complementary metal-oxide semiconductor (CMOS) image sensor.
2. Description of the Related Art
In recent years, in addition to charge coupled devices (CCDs), CMOS image sensors have been broadly used for digital still cameras, camcorders, surveillance cameras, and so forth. The market for CMOS image sensors has expanded.
Such a CMOS image sensor converts light that enters individual pixels into electrons using photodiodes that are photoelectric conversion elements, and accumulates the electrons for a fixed period. Then, the CMOS image sensor digitizes a signal that is set in accordance with the amount of accumulated charge, and outputs the signal to an external digital signal processor (DSP) or the like.
Generally, for timing adjustment between a device and an external device, a delay-locked loop (DLL) circuit is used, which controls a delay time that occurs in an external interface due to wire load, and which performs adjustment for synchronization between signals on data lines and an internal clock.
However, in an image sensor, because of demand for increase in the number of pixels, it is necessary to minimize peripheral circuits excluding pixels, and it is difficult to mount a DLL circuit on each data line.
A delay circuit to which a technique that is disclosed in U.S. Pat. No. 5,982,241 is applied is proposed.
Regarding the delay circuit, generation of a delay time is performed with a high accuracy using a phase-locked loop (PLL), and the delay time is set in the delay circuit that is disposed on each data line.
In the delay circuit, the delay time can be controlled by controlling an oscillation frequency of the PLL. In a method using the delay circuit, an oscillator that is provided in the PLL is used as the delay circuit, whereby the small delay circuit having a high accuracy can be realized.
Furthermore, in Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2007-538473, a wide range clock generator that can adjust a delay time for each data line is proposed.